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CMX813
Multi-Standard Analogue Paging Decoder
D/813/3 December 2000 Provisional Issue
Features
* Pre-Programmed to Decode all Major
Applications
* Two-Tone and 5/6-Tone Pagers * Selective Calling (SELCALL) Systems * Voice Pager Switching and Signalling * Revertive Paging Systems * Wireless Local Loop Signalling * Audio Tone Signalling Applications
Two-Tone, 5/6-Tone and HSC Tonesets
* Low Power: 0.5mA at 2.7V typically * Superior Signal to Noise Performance * Low Cost 3.58MHz Xtal/Clock * C Serial Interface + TSSOP Package
1.1
Brief Description
The CMX813 decodes the signalling tones for the Motorola Quick Call series, GE groups A, B and C and the tonesets employed by the Zetron, Reach and Plectron 2-tone radio paging systems. It also decodes the tones for Motorola 5/6-tone paging and the EIA, CCIR, ZVEI1 and EEA tonesets used for HSC radio paging and SELCALL. A simple serial interface allows the host C to specify the individual tone(s), or group of tones, to be decoded from the extensive list held by the CMX813. When the C receives an IRQN it examines the STATUS and DECODED TONE ADDRESS Registers to reveal the tone decoded. In 2-tone mode, the CMX813 will report which of the (up to eight) selected tones it has decoded. This report is an 8-bit index number to the tone in the programmed list. For 5/6-tone or HSC groups, the CMX813 will report which tone in the selected system toneset (eg CCIR, EIA) has been decoded, as a 4-bit hexadecimal tone value within the selected group. To allow for cadence measurements, the IRQN is activated again when the tone is no longer present. A status value of "No-tone" is returned. The CMX813 is designed to operate over a wide temperature range with a typical operating current of 0.5mA at 2.7Volts. It also has a Zero-Power mode and is available in TSSOP (E4) and DIL (P3) packages.
(c) 2000 Consumer Microcircuits Limited
Multi-Standard Analogue Paging Decoder
CMX813
CONTENTS Section 1.0 1.1 1.2 1.3 1.4 1.5 Page Features and Applications..................................................................1 Brief Description..................................................................................1 Block Diagram .....................................................................................3 Signal List ............................................................................................4 External Components .........................................................................6 General Description ............................................................................7 1.5.1 Software Description ..............................................................7 Application Notes..............................................................................11 1.6.1 General ..................................................................................11 1.6.2 Tx Tone Table........................................................................11 Performance Specification ...............................................................18 1.7.1 Electrical Performance .........................................................18 1.7.2 Packaging..............................................................................21
1.6
1.7
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1.2
Block Diagram
Figure 1 Block Diagram
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1.3
Signal List
Package E4/P3 Pin No. 1
Signal
Description
Name SERIAL CLOCK
Type I/P The "C-BUS" serial clock input. This clock, produced by the Controller, is used for transfer timing of commands and data to and from the device. See "C-BUS" Timing Diagram (Figure 3). The "C-BUS" serial data input from the Controller. Data is loaded into this device in 8-bit bytes, MSB (D7) first, and LSB (D0) last, synchronised to the SERIAL CLOCK. See "C-BUS" Timing Diagram (Figure 3). The "C-BUS" serial data output to the Controller. The transmission of REPLY DATA bytes is synchronised to the SERIAL CLOCK under the control of the CSN input. This 3-state output is held at high impedance when not sending data to the Controller. See "C-BUS" Timing Diagram (Figure 3). The "C-BUS" data loading control function: this input is provided by the Controller. Data transfer sequences are initiated, completed or aborted by the CSN signal. See "C-BUS" Timing Diagram (Figure 3). This output indicates an interrupt condition to the Controller by going to a logic "0". This is a "wire-ORable" output, enabling the connection of up to 8 peripherals to 1 interrupt port on the Controller. This pin has a low impedance pulldown to logic "0" when active and a high-impedance when inactive. An external pullup resistor is required. An interrupt is effective if not masked out by the IRQ MASK (bit 0 in the SUB-AUDIO CONTROL register $80).
2
COMMAND DATA
I/P
3
REPLY DATA
O/P
4
CSN
I/P
5
IRQN
O/P
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1.3
Signal List (continued)
Package E4/P3 Pin No. 6
Signal
Description
Name NC
Type Reserved for future use. Do not make any connection to this pin. For manufacturer's use only. Connect to Vss. Power I/P O/P The negative supply rail (ground). The inverting input to the input amplifier. The output of the input amplifier and the input to the Digital filter section. ) Reserved for future use. Do not make ) any connection to these pins. ) I/P O/P Power The input of the on-chip oscillator. The inverted output of the on-chip oscillator. The positive supply rail. Levels and voltages are dependent upon this supply. This pin should be decoupled to VSS by a capacitor.
7
NC
8 9 10
Vss SIGNAL IN OPAMP OUT NC NC NC XTAL XTALN VDD
11 12 13 14 15 16
Notes: I/P = Input O/P = Output
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1.4
External Components
C1 C2 C3 C4 C5
18pF 18pF 68nF 0.1F 22pF
20% 20% 20% 20% 20%
R1 R2 R3 R4 X1
1M 22k 1M 51k 3.5795450MHz
5% 10% 10% 10% 100ppm
Figure 2 Recommended External Components
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1.5
General Description
When the CMX813 detects the start of a tone, it generates an interrupt and reports which tone was detected. At the end of the tone it will produce an interrupt and report Notone detected. The host micro should measure and interpret the tone lengths and gap lengths according to calling code requirements. The device is not designed for the decoding of multiple tones which are present simultaneously. In 2-tone mode, the parameters for decoding each tone in the tone table are stored in a decoding ROM, and any one of these tones can be selected for decoding via an 8-bit ROM address. Up to eight 8-bit ROM addresses can be selected by the host micro for decoding. These are held in an internal address RAM which downloads the addresses sequentially to the ROM and retrieves the tone decode parameters and matches these with the received signal to a find tone decode. If a match is found, the CMX813 generates an interrupt and reports the decoded tone table ROM address. The device can therefore decode any number of single or 2-tone pager codes, formed by any combination of up to 8 different frequencies, received in any order. In 5/6 tone and HSC modes, the tone parameters are stored in ROM in groups of 16 tones in accordance with the various international tonesets (CCIR/ZVEI etc.). Any one of these groups can be selected for decoding at any time. ROM address sequencing is automatic. When any one of the 16 tones in that group is decoded the device interrupts and reports the group and tone number of the tone (8 bits). The input amplifier with suitable external components is used to adjust the received signal to the correct amplitude for the decoder. All functions are controlled over a "C-BUS" serial C interface. 1.5.1 Software Description Address/Commands Instructions and data are transferred, via "C-BUS", in accordance with the timing information given in Figure 3. Instruction and data transactions to and from the CMX813 consist of an Address/Command (A/C) byte which may be followed by either: (i) (ii) a further instruction or data (1 btye) or a status or Rx data reply (1 byte)
8-bit Write Only Registers
HEX ADDRESS/ COMMAND $01 REGISTER NAME BIT 7 (D7) BIT 6 (D6) BIT 5 (D5) BIT 4 (D4) BIT 3 (D3) BIT 2 (D2) BIT 1 (D1) BIT 0 (D0)
GENERAL RESET
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
ROM PAGE SELECT $30 CONTROL TONE ADDRESS MSB BIT 7 MSB BIT 7 LSB BIT 6 MSB BIT 5
DECODER BANDWIDTH LSB BIT 2
OPERATION MODE MSB BIT 1 LSB BIT 0 LSB BIT 0
BIT 4 BIT 3 TONE ADDRESS BIT 4 BIT 3
$31
BIT6
BIT 5
BIT 2
BIT 1
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Write Only Register Description GENERAL RESET (Hex address $01) The reset command has no data attached to it. It sets the device (write) registers to zero and enters the Zero Power mode. And all RAM contents and RAM FULL bit of the STATUS Register are reset to 0. CONTROL Register (Hex address $30) This register is used to control the functions of the device as described below: ROM PAGE SELECT (Bits 7 and 6) These two bits select the section of the ROM where pre-programmed tone data are stored for detection. The ROM area is divided into three sections (pages). The 1 tone or 2 tone system tones are stored in ROM Page 1 and 2. The 5/6 tone and HSC tones are stored in ROM Page 3. Bit 7 Bit 6 ROM PAGE 0 0 No ROM PAGE selected, a valid but unrecognised tone may be detected, no interrupt generated 0 1 ROM Page 1 selected, for 1 tone or 2 tone system 1 0 ROM Page 2 selected, for 1 tone or 2 tone system 1 1 ROM Page 3 selected, for 5/6 tone or HSC tone system These four bits set the bandwidth of the tone decoder according to the table below:
DECODER BANDWIDTH (Bits 5, 4, 3 and 2) Bit 5 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 OPERATION MODE (Bits 1 and 0) Bit 1 0 0 1 1
Bit 4 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
Bit 3 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
Bit 2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
BANDWIDTH Nominal Decode 0.1% 0.3% 0.5% 0.7% 0.9% 1.1% 1.3% 1.5% 1.7% 1.9% 2.1% 2.3% 2.5% 2.7% 2.9% 3.1%
These two bits select the mode of operation of the device. Bit 0 0 1 0 1 OPERATION MODE Zero Power Clear RAM, all RAM contents and RAM FULL bit of the STATUS Register are reset to 0. Normal operation, decode enabled Reserved
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TONE ADDRESS Register (Hex address $31) This register is used to load ROM addresses to the internal RAM for decode as described below: TONE ADDRESS (Bits 7, 6, 5, 4, 3, 2, 1, and 0) The parameters (centre frequency) for decoding each tone in the tone table are stored in a decoding ROM, and any one of these tones can be selected for decoding via this 8-bit ROM address. The tones table and address allocations are listed in the Application Notes, Section 1.6. For a 1 tone or 2 tone system, up to eight ROM addresses can be loaded to the RAM for decode from a chosen ROM page. A FIFO system is used for loading the RAM memory. If more than 8 ROM addresses were loaded to the RAM, only the last 8 entries will be stored. For the 5/6 tone and HSC tone system, Bits 7, 6, 5, and 4 are used to select a specific tone set (CCIR/ZVEI etc.) for decode. The decode algorithm will search automatically through the sixteen ROM addresses associated with the chosen tone set. Bits 3, 2, 1, and 0 are not used and should be set to 0.
8-bit Read Only Registers
HEX ADDRESS/ COMMAND $38 REGISTER NAME DECODED TONE ADDRESS STATUS BIT 7 (D7) BIT 6 (D6) BIT 5 (D5) BIT 4 (D4) BIT 3 (D3) BIT 2 (D2) BIT 1 (D1) BIT 0 (D0)
DECODED TONE ADDRESS MSB BIT 7 BIT6 BIT 5 Reserved set to 1 1 0 BIT 4 RAM FULL BIT 3 DECODE STATUS CHANGE BIT 2 TONE DECODE LSB BIT 1 BIT 0 DECODED ROM PAGE MSB LSB BIT 1 BIT 0
$3F
Read Only Register Description DECODED TONE ADDRESS Register (Hex address $38) This register is used to send the decoded ROM addresses to the host micro as described below: DECODED TONE ADDRESS (Bits 7, 6, 5, 4, 3, 2, 1, and 0) When a tone is decoded, the CMX813 generates an interrupt and reports the decoded tone table 8-bit ROM address. The tone table and address allocations are listed in the Application Notes, Section 1.6. For the 1 tone or 2 tone system, the 8-bit ROM address is located either from ROM PAGE 1 or 2. For the 5/6 tone and HSC tones system, Bits 7, 6, 5, and 4 represent the selected tone set (CCIR/ZVEI etc), Bits 3, 2, 1, and 0 are the 4 bit Hexadecimal tone value within the selected group. This is located in ROM PAGE 3.
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STATUS Register (Hex address $3F) This register is used to indicate the status of the device as described below: (Bits 7, 6 and 5) Reserved for future use. These will be set to "110" respectively but should be ignored by user's software. After eight tone addresses are loaded to the RAM for tones located in ROM PAGE 1 or 2, this bit is set to `1'. A Clear RAM command will reset it to `0'. When TONE DECODE (Bit 2 of this register) or the decoded 8 bit address in DECODED TONE ADDRESS Register $38 changes state this bit will be set to "1". A "0" indicates no decode status change. This bit indicates the status of the tone decoder. A "1" indicates a tone has been detected (TONE DECODE) and a "0" indicates the loss of the tone (NOTONE). TONE DECODE means that a tone has been decoded and its characteristics are as defined by the bandwidth (see CONTROL Register $30, Bits 5, 4, 3 and 2) and the centre frequency ( see TONE ADDRESS Register $31, Bit 7 to Bit 0). When Bit 7 and Bit 6 in the CONTROL Register $30 are set to "0" the TONE DECODE Bit 2 will be set to "0". From NOTONE state, identification of a valid tone which is not in the preprogrammed list (up to eight tones in 1 or 2 tone system and 16 tones in 5/6 tone or HSC) will cause the decoder to move to the TONE DECODE state with the DECODED ROM PAGE address of "00" in Bits 1 and 0; indicating a valid but unrecognised tone. No interrupt is generated. Loss of tone will cause the NOTONE timer to be started. If loss of tone continues for the duration of the time-out period, then the decoder will move to the NOTONE state and the identification of pre-programmed tones will start again. The time-out period is not user adjustable. DECODED ROM PAGE (Bits 1 and 0) These two bits represent the ROM PAGE where the decoded tone is located.
RAM FULL (Bit 4) DECODE STATUS CHANGE (Bit 3) TONE DECODE (Bit 2)
DECODED ROM PAGE Bit 1 0 0 1 1 Bit 0 0 1 0 1 A valid but unrecognised tone Decoded tone in ROM Page 1 Decoded tone in ROM Page 2 Decoded tone in ROM Page 3
If the DECODE STATUS CHANGE (Bit 3) of the STATUS Register is `1' or the RAM FULL (Bit 4) of the STATUS Register changes from `0' to `1' then the IRQN output will be pulled low. Reading the STATUS register clears the interrupt (IRQN output pulled high) and also clears Bit 3 of the STATUS Register, if set. A Clear RAM command clears Bit 4 of the STATUS Register, if set. In Zero Power mode, Status Register Bits 7 to 0 are preset to "110x0000" respectively. RAM FULL (Bit 4) remains undisturbed.
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1.6 Application Notes
1.6.1 General
The device should be reset first by the command GENERAL RESET $01. The decoder should then be set up according to the desired characteristics. This entails setting the DECODER BANDWIDTH and select the ROM PAGE in the CONTROL Register $30, also selecting tones in the chosen ROM PAGE by TONE ADDRESS Register $31 (programming the centre frequencies of the desired tones). Up to 8 tones can be programmed either from ROM PAGE 1 or ROM PAGE 2. The RAM memory location 1 is loaded first then incrementally loaded to location 8. Alternatively, a tone group can be selected from ROM PAGE 3. The decoder is enabled by the CONTROL Register $30. During operation when the device is receiving, the tones are scanned in the sequence of their location; once a tone is detected the remaining tones are not checked. When the decoder detects a change in its present state an interrupt will be generated. The change that occurred can be read from Bit 3 of the STATUS Register $3F if a tone is detected. NOTONE is indicated by Bit 2 of the same register. The ROM PAGE of that tone can be read from Bits 1 and 0 of the same register. The interrupt is cleared by reading the STATUS Register. The decoded tone address can be read from the DECODED TONE ADDRESS Register $38
1.6.2 Tone Tables The tables on the following pages list the commonly used paging tones and the corresponding ROM address for programming the TONE ADDRESS Register $31.
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D7 D6 D5 D4 D3 D2 D1 D0 Hex 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 1 01 0 0 0 0 0 0 1 0 02 0 0 0 0 0 0 1 1 03 0 0 0 0 0 1 0 0 04 0 0 0 0 0 1 0 1 05 0 0 0 0 0 1 1 0 06 0 0 0 0 0 1 1 1 07 0 0 0 0 1 0 0 0 08 0 0 0 0 1 0 0 1 09 0 0 0 0 1 0 1 0 0A 0 0 0 0 1 0 1 1 0B 0 0 0 0 1 1 0 0 0C 0 0 0 0 1 1 0 1 0D 0 0 0 0 1 1 1 0 0E 0 0 0 0 1 1 1 1 0F 0 0 0 1 0 0 0 0 10 0 0 0 1 0 0 0 1 11 0 0 0 1 0 0 1 0 12 0 0 0 1 0 0 1 1 13 0 0 0 1 0 1 0 0 14 0 0 0 1 0 1 0 1 15 0 0 0 1 0 1 1 0 16 0 0 0 1 0 1 1 1 17 0 0 0 1 1 0 0 0 18 0 0 0 1 1 0 0 1 19 0 0 0 1 1 0 1 0 1A 0 0 0 1 1 0 1 1 1B 0 0 0 1 1 1 0 0 1C 0 0 0 1 1 1 0 1 1D 0 0 0 1 1 1 1 0 1E 0 0 0 1 1 1 1 1 1F 0 0 1 0 0 0 0 0 20 0 0 1 0 0 0 0 1 21 0 0 1 0 0 0 1 0 22 0 0 1 0 0 0 1 1 23 0 0 1 0 0 1 0 0 24 0 0 1 0 0 1 0 1 25 0 0 1 0 0 1 1 0 26 0 0 1 0 0 1 1 1 27 0 0 1 0 1 0 0 0 28 0 0 1 0 1 0 0 1 29 0 0 1 0 1 0 1 0 2A 0 0 1 0 1 0 1 1 2B 0 0 1 0 1 1 0 0 2C
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ROM PAGE 1 System Tone # Freq. Mot.1 0 1 2 3 4 5 6 7 8 9 Diag. 0 1 2 3 4 5 6 7 8 9 Diag. 0 1 2 3 4 5 6 7 8 9 Diag. 0 1 2 3 4 5 6 7 8 9 Diag. 330.5 349 368.5 389 410.8 433.7 457.9 483.5 510.5 539 569.1 569.1 600.9 634.5 669.9 707.3 746.8 788.5 832.5 879 928.1 979.9 1092.4 288.5 296.5 304.7 313 953.7 979.9 1006.9 1034.7 1063.2 569.1 321.7 339.6 358.6 378.6 399.8 422.1 445.7 470.5 496.8 524.6 569.1
Mot. 2
Mot. 3
Mot. 4
ROM PAGE 2 System Tone # Chnl. Reach 0 Single 1 Tone 2 3 4 5 6 7 8 9 10 Reach 1 11 Group A 2 12 3 13 4 14 5 15 6 16 7 17 8 18 9 19 0 20 Reach 1 21 Group B 2 22 3 23 4 24 5 25 6 26 7 27 8 28 9 29 0 30 Reach 1 31 Group C 2 32 3 33 4 34 5 35 6 36 7 37 8 38 9 39 0 40 Reach 1 41 Group D 2 42 3 43 4 44
Freq.
Reserved Reserved Reserved Reserved
3446 3329 3215 3106 3000 2898 2799 2704 2612 2523 2437 2354 2274 2196 2121 2049 1980 1912 1847 1784 1723 1664 1608 1553 1500 1449 1400 1352 1306 1261 1219 1177 1137 1098 1061 1025 990 956 923 892 862
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ROM PAGE 1 D7 D6 D5 D4 D3 D2 D1 D0 Hex System Tone # Freq. 0 0 1 0 1 1 0 1 2D Mot. 5 0 553.9 0 0 1 0 1 1 1 0 2E 1 584.8 0 0 1 0 1 1 1 1 2F 2 617.4 0 0 1 1 0 0 0 0 30 3 651.9 0 0 1 1 0 0 0 1 31 4 688.3 0 0 1 1 0 0 1 0 32 5 726.8 0 0 1 1 0 0 1 1 33 6 767.4 0 0 1 1 0 1 0 0 34 7 810.2 0 0 1 1 0 1 0 1 35 8 855.5 0 0 1 1 0 1 1 0 36 9 903.2 0 0 1 1 0 1 1 1 37 Diag. 979.9 0 0 1 1 1 0 0 0 38 Mot. 6 0 1122.5 0 0 1 1 1 0 0 1 39 1 1153.4 0 0 1 1 1 0 1 0 3A 2 1185.2 0 0 1 1 1 0 1 1 3B 3 1217.8 0 0 1 1 1 1 0 0 3C 4 1251.4 0 0 1 1 1 1 0 1 3D 5 1285.8 0 0 1 1 1 1 1 0 3E 6 1321.2 0 0 1 1 1 1 1 1 3F 7 1357.6 0 1 0 0 0 0 0 0 40 8 1395 0 1 0 0 0 0 0 1 41 9 1433.4 ROM PAGE 1 System Tone # Freq. Diag. 979.9 Mot. 10 0 1472.9 1 1513.5 2 1555.2 3 1598 4 1642 5 1687.2 6 1733.7 7 1781.5 8 1830.5 9 1881 Mot. 11 0 1930.2 1 1989 2 2043.8 3 2094.5 4 2155.6 5 2212.2 6 2271.7 7 2334.6 8 2401
ROM PAGE 2 System Tone # Chnl. Reach 5 45 Group D 6 46 continue 7 47 8 48 9 49 0 50 1 51 Reach 2 52 Group E 3 53 4 54 5 55 6 57 7 58 8 59 9 60
Freq. 832 804 776 750 725 700 676 653 631 609 588 549 530 512 495 -
D7 D6 D5 D4 D3 D2 D1 D0 Hex 0 1 0 0 0 0 1 0 42 0 1 0 0 0 0 1 1 43 0 1 0 0 0 1 0 0 44 0 1 0 0 0 1 0 1 45 0 1 0 0 0 1 1 0 46 0 1 0 0 0 1 1 1 47 0 1 0 0 1 0 0 0 48 0 1 0 0 1 0 0 1 49 0 1 0 0 1 0 1 0 4A 0 1 0 0 1 0 1 1 4B 0 1 0 0 1 1 0 0 4C 0 1 0 0 1 1 0 1 4D 0 1 0 0 1 1 1 0 4E 0 1 0 0 1 1 1 1 4F 0 1 0 1 0 0 0 0 50 0 1 0 1 0 0 0 1 51 0 1 0 1 0 0 1 0 52 0 1 0 1 0 0 1 1 53 0 1 0 1 0 1 0 0 54 0 1 0 1 0 1 0 1 55
ROM PAGE 2 System Tone # Freq. Plectron 0 282.2 1 294.7 2 307.8 3 321.4 4 335.6 5 350.5 6 366 7 382.3 8 399.2 9 416.9 10 435.3 11 454.6 12 474.8 13 495.8 14 517.8 15 540.7 16 564.7 17 589.7 18 615.8 19 643
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ROM PAGE 1 ROM PAGE 2 D7 D6 D5 D4 D3 D2 D1 D0 Hex System Tone # Freq. System Tone # Freq. 0 1 0 1 0 1 1 0 56 9 2468.2 Plectron 20 672 0 1 0 1 0 1 1 1 57 GE. A 0 682.5 continue 21 701 0 1 0 1 1 0 0 0 58 1 592.5 22 732 0 1 0 1 1 0 0 1 59 2 757.5 23 765 0 1 0 1 1 0 1 0 5A 3 802.5 24 799 0 1 0 1 1 0 1 1 5B 4 847.5 25 834 0 1 0 1 1 1 0 0 5C 5 892.5 26 871 0 1 0 1 1 1 0 1 5D 6 937.5 27 910 0 1 0 1 1 1 1 0 5E 7 547.5 28 950 0 1 0 1 1 1 1 1 5F 8 727.5 29 992 0 1 1 0 0 0 0 0 60 9 637.5 30 1036 0 1 1 0 0 0 0 1 61 Diag. 742.5 31 1082 0 1 1 0 0 0 1 0 62 GE. B 0 652.5 32 1130 0 1 1 0 0 0 1 1 63 1 607.5 33 1180 0 1 1 0 0 1 0 0 64 2 787.5 34 1232 0 1 1 0 0 1 0 1 65 3 832.5 35 1287 0 1 1 0 0 1 1 0 66 4 877.5 36 1344 0 1 1 0 0 1 1 1 67 5 922.5 37 1403 0 1 1 0 1 0 0 0 68 6 967.5 38 1465 0 1 1 0 1 0 0 1 69 7 517.5 39 1530 0 1 1 0 1 0 1 0 6A 8 562.5 40 1598 0 1 1 0 1 0 1 1 6B 9 697.5 41 1669 ROM PAGE 1 D7 D6 D5 D4 D3 D2 D1 D0 Hex System Tone # Freq. 0 1 1 0 1 1 0 0 6C Diag. 742.5 0 1 1 0 1 1 0 1 6D GE. C 0 667.5 0 1 1 0 1 1 1 0 6E 1 712.5 0 1 1 0 1 1 1 1 6F 2 772.5 0 1 1 1 0 0 0 0 70 3 817.5 0 1 1 1 0 0 0 1 71 4 862.5 0 1 1 1 0 0 1 0 72 5 907.5 0 1 1 1 0 0 1 1 73 6 952.5 0 1 1 1 0 1 0 0 74 7 532.5 0 1 1 1 0 1 0 1 75 8 577.5 0 1 1 1 0 1 1 0 76 9 622.5 0 1 1 1 0 1 1 1 77 Diag. 742.5 0 1 1 1 1 0 0 0 78 Mot. A 0 358.9 0 1 1 1 1 0 0 1 79 1 398.1 0 1 1 1 1 0 1 0 7A 2 441.6 0 1 1 1 1 0 1 1 7B 3 489.8 0 1 1 1 1 1 0 0 7C 4 543.3 0 1 1 1 1 1 0 1 7D 5 602.6 0 1 1 1 1 1 1 0 7E 6 668.3 0 1 1 1 1 1 1 1 7F 7 741.3
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ROM PAGE 2 System Tone # Freq. Plectron 42 1743 continue 43 1820 44 1901 45 1985 46 2073 47 2164 48 2260 49 2361 50 2465 51 2575 52 2688 53 2807 54 2932 55 3062 56 3197 57 3339 58 3487 59 1957 -
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ROM PAGE 1 D7 D6 D5 D4 D3 D2 D1 D0 Hex System Tone # Freq. 1 0 0 0 0 0 0 0 80 8 822.2 1 0 0 0 0 0 0 1 81 Mot. A 9 912 1 0 0 0 0 0 1 0 82 continue A 1011.6 1 0 0 0 0 0 1 1 83 B 1122.1 1 0 0 0 0 1 0 0 84 Diag. 979.9 1 0 0 0 0 1 0 1 85 Mot. B 0 371.5 1 0 0 0 0 1 1 0 86 1 412.1 1 0 0 0 0 1 1 1 87 2 457.1 1 0 0 0 1 0 0 0 88 3 507 1 0 0 0 1 0 0 1 89 4 562.3 1 0 0 0 1 0 1 0 8A 5 623.7 1 0 0 0 1 0 1 1 8B 6 691.8 1 0 0 0 1 1 0 0 8C 7 767.4 1 0 0 0 1 1 0 1 8D 8 851.1 1 0 0 0 1 1 1 0 8E 9 944.1 1 0 0 0 1 1 1 1 8F A 1047.1 1 0 0 1 0 0 0 0 90 B 1161.4 1 0 0 1 0 0 0 1 91 Diag. 979.9 1 0 0 1 0 0 1 0 92 Mot. Z 0 346.7 1 0 0 1 0 0 1 1 93 1 384.6 1 0 0 1 0 1 0 0 94 2 426.6 1 0 0 1 0 1 0 1 95 3 473.2 1 0 0 1 0 1 1 0 96 4 524.8 1 0 0 1 0 1 1 1 97 5 582.1 1 0 0 1 1 0 0 0 98 6 645.7 1 0 0 1 1 0 0 1 99 7 716.1 1 0 0 1 1 0 1 0 9A 8 794.3 1 0 0 1 1 0 1 1 9B 9 881 1 0 0 1 1 1 0 0 9C A 977.2 1 0 0 1 1 1 0 1 9D B 1084 1 0 0 1 1 1 1 0 9E Diag. 979.9 1 0 0 1 1 1 1 1 9F Zetron 1980 1 0 1 0 0 0 0 0 A0 Grp. 1 2704 1 0 1 0 0 0 0 1 A1 2612 1 0 1 0 0 0 1 0 A2 2523 1 0 1 0 0 0 1 1 A3 2437 1 0 1 0 0 1 0 0 A4 2354 1 0 1 0 0 1 0 1 A5 2274 1 0 1 0 0 1 1 0 A6 2196 1 0 1 0 0 1 1 1 A7 2121 1 0 1 0 1 0 0 0 A8 2049 1 0 1 0 1 0 0 1 A9 Grp. 2 1177 1 0 1 0 1 0 1 0 AA 1608 1 0 1 0 1 0 1 1 AB 1553 1 0 1 0 1 1 0 0 AC 1500
(c) 2000 Consumer Microcircuits Limited
ROM PAGE 3 System Tone # Freq. EIA 0 600 1 741 2 882 3 1023 4 1164 5 1305 6 1446 7 1587 8 1728 9 1869 A 2151 B 2435 X/C 2010 D 2295 R/E 459 F CCIR 0 1981 1 1124 2 1197 3 1275 4 1358 5 1446 6 1540 7 1640 8 1747 9 1860 A 2400 B 930 X/C 2247 D 991 R/E 2110 F 1055 ZVEI1 0 2400 1 1060 2 1160 3 1270 4 1400 5 1530 6 1670 7 1830 8 2000 9 2200 A 2800 B 810 X/C 970
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Multi-Standard Analogue Paging Decoder
CMX813
ROM PAGE 1 D7 D6 D5 D4 D3 D2 D1 D0 Hex System Tone # Freq. 1 0 1 0 1 1 0 1 AD 1449 1 0 1 0 1 1 1 0 AE Zetron 1400 1 0 1 0 1 1 1 1 AF Grp. 2 1352 1 0 1 1 0 0 0 0 B0 continue 1306 1 0 1 1 0 0 0 1 B1 1261 1 0 1 1 0 0 1 0 B2 1219 1 0 1 1 0 0 1 1 B3 Grp. 3 1400 1 0 1 1 0 1 0 0 B4 1912 1 0 1 1 0 1 0 1 B5 1847 1 0 1 1 0 1 1 0 B6 1784 1 0 1 1 0 1 1 1 B7 1723 1 0 1 1 1 0 0 0 B8 1664 1 0 1 1 1 0 0 1 B9 1608 1 0 1 1 1 0 1 0 BA 1553 1 0 1 1 1 0 1 1 BB 1500 1 0 1 1 1 1 0 0 BC 1449 1 0 1 1 1 1 0 1 BD Grp. 4 832 1 0 1 1 1 1 1 0 BE 1137 1 0 1 1 1 1 1 1 BF 1098 1 1 0 0 0 0 0 0 C0 1061 1 1 0 0 0 0 0 1 C1 1025 1 1 0 0 0 0 1 0 C2 990 1 1 0 0 0 0 1 1 C3 956 1 1 0 0 0 1 0 0 C4 923 1 1 0 0 0 1 0 1 C5 892 1 1 0 0 0 1 1 0 C6 862 1 1 0 0 0 1 1 1 C7 Grp. 5 588 1 1 0 0 1 0 0 0 C8 804 1 1 0 0 1 0 0 1 C9 776 1 1 0 0 1 0 1 0 CA 750 1 1 0 0 1 0 1 1 CB 725 1 1 0 0 1 1 0 0 CC 700 1 1 0 0 1 1 0 1 CD 676 1 1 0 0 1 1 1 0 CE 653 1 1 0 0 1 1 1 1 CF 631 1 1 0 1 0 0 0 0 D0 609 1 1 0 1 0 0 0 1 D1 1 1 0 1 0 0 1 0 D2 1 1 0 1 0 0 1 1 D3 1 1 0 1 0 1 0 0 D4 1 1 0 1 0 1 0 1 D5 1 1 0 1 0 1 1 0 D6 1 1 0 1 0 1 1 1 D7 1 1 0 1 1 0 0 0 D8 -
ROM PAGE 3 System Tone # Freq. ZVEI1 D 885 continue R/E 2600 F 680 ZVEI2 0 2400 1 1060 2 1160 3 1270 4 1400 5 1530 6 1670 7 1830 8 2000 9 2200 A 885 B 810 X/C 740 D 680 R/E 970 F 2600 ZVEI3/ 0 2200 DZVEI 1 970 2 1060 3 1160 4 1270 5 1400 6 1530 7 1670 8 1830 9 2000 A 825 B 740 X/C 2600 D 885 R/E 2400 F 680 PZVEI 0 2400 1 1060 2 1160 3 1270 4 1400 5 1530 6 1670 7 1830 8 2000
(c) 2000 Consumer Microcircuits Limited
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Multi-Standard Analogue Paging Decoder
CMX813
ROM PAGE 1 D7 D6 D5 D4 D3 D2 D1 D0 Hex System Tone # Freq. 1 1 0 1 1 0 0 1 D9 1 1 0 1 1 0 1 0 DA 1 1 0 1 1 0 1 1 DB 1 1 0 1 1 1 0 0 DC 1 1 0 1 1 1 0 1 DD 1 1 0 1 1 1 1 0 DE 1 1 0 1 1 1 1 1 DF 1 1 1 0 0 0 0 0 E0 1 1 1 0 0 0 0 1 E1 1 1 1 0 0 0 1 0 E2 1 1 1 0 0 0 1 1 E3 1 1 1 0 0 1 0 0 E4 1 1 1 0 0 1 0 1 E5 1 1 1 0 0 1 1 0 E6 1 1 1 0 0 1 1 1 E7 1 1 1 0 1 0 0 0 E8 1 1 1 0 1 0 0 1 E9 1 1 1 0 1 0 1 0 EA 1 1 1 0 1 0 1 1 EB 1 1 1 0 1 1 0 0 EC 1 1 1 0 1 1 0 1 ED 1 1 1 0 1 1 1 0 EE 1 1 1 0 1 1 1 1 EF 1 1 1 1 0 0 0 0 F0 1 1 1 1 0 0 0 1 F1 1 1 1 1 0 0 1 0 F2 1 1 1 1 0 0 1 1 F3 1 1 1 1 0 1 0 0 F4 1 1 1 1 0 1 0 1 F5 1 1 1 1 0 1 1 0 F6 1 1 1 1 0 1 1 1 F7 1 1 1 1 1 0 0 0 F8 1 1 1 1 1 0 0 1 F9 1 1 1 1 1 0 1 0 FA 1 1 1 1 1 0 1 1 FB 1 1 1 1 1 1 0 0 FC 1 1 1 1 1 1 0 1 FD 1 1 1 1 1 1 1 0 FE 1 1 1 1 1 1 1 1 FF -
ROM PAGE 3 System Tone # Freq. PZVEI 9 2200 continue A 970 B 810 X/C 2800 D 885 R/E 2600 F 680 EEA 0 1981 1 1124 2 1197 3 1275 4 1358 5 1446 6 1540 7 1640 8 1747 9 1860 A 1055 B 930 X/C 2247 D 991 R/E 2110 F 2400 -
(c) 2000 Consumer Microcircuits Limited
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Multi-Standard Analogue Paging Decoder
CMX813
1.7
1.7.1
Performance Specification
Electrical Performance
1.7.1.1 Absolute Maximum Ratings Exceeding these maximum ratings can result in damage to the device. Min. -0.3 -0.3 -30 -20 Max. 7.0 VDD + 0.3 +30 +20 Units V V mA MA
Supply (VDD - VSS) Voltage on any pin to VSS Current into or out of VDD and VSS pins Current into or out of any other pin
E4 Package Total Allowable Power Dissipation at Tamb = 25C ... Derating Storage Temperature Operating Temperature
Min.
-55 -40
Max. 300 5 +125 +85
Units mW mW/C C C
P3 Package Total Allowable Power Dissipation at Tamb = 25C ... Derating Storage Temperature Operating Temperature
Min.
-55 -40
Max. 800 13 +125 +85
Units mW mW/C C C
1.7.1.2 Operating Limits Correct operation of the device outside these limits is not implied. Notes Supply (VDD - VSS) Operating Temperature Xtal Frequency Min. 2.7 -40 3.579187 Max. 5.5 +85 3.579903 Units V C MHz
(c) 2000 Consumer Microcircuits Limited
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Multi-Standard Analogue Paging Decoder
CMX813
1.7.1.3 Operating Characteristics For the following conditions unless otherwise specified: Xtal Frequency = 3.579545MHz. VDD = 2.7V to 5.5V, Tamb = -40C to +85C. Noise Bandwidth = 5kHz Band Limited Gaussian, 0dB reference = 775mVrms Notes DC Parameters At VDD = 2.7V IDD ( Zero Power) IDD (Operating) At VDD = 5.0V IDD (Zero Power) IDD (Operating) "C-BUS" Interface Input Logic "1" Input Logic "0" Input Leakage Current (Logic "1" or "0") Input Capacitance Output Logic "1" (IOH = 360A) Output Logic "0" (IOL = 360A) IRQN O/P "Off" State Leakage Current (Vout = VDD) AC Parameters Decoder Sensitivity Tone Measurement Resolution Tone Measurement Accuracy Response Time 2-Tone Mode De-Response Time 2-Tone Mode Response Time 5/6-Tone and HSC Mode De-Response Time 5/6-Tone and HSC Mode Frequency Range Signal/Noise Input Amplifier Open Loop Gain Unity Gain Bandwidth Input Impedance Output Impedance Min. Typ. Max. Units
1 1
-
1.0 0.5
2.0 1.0
A mA
1 1
-
1.0 1.0
2.0 2.0
A mA
70% -1.0 90% -
-
30% 1.0 7.5 10% 1.0
VDD VDD A pF VDD VDD A
2
3 3 3 3
280
-65.0 0.2 0.5 30.0 76.0 25.0 43.0 2.0
46.0 82.0 34.0 62.0 3500
dB % % ms ms ms ms Hz dB
(I/P = 1mV at 100Hz) (at 100Hz) (Open Loop)
10.0 -
70.0 5.0 6.0
-
dB MHz M k
Xtal/Clock Input Pulse Width ('High' or 'Low') Input Impedance (at 100Hz) Gain (I/P = 1mVrms at 100Hz) Notes: 1. 2. 3. 4.
4
40.0 10.0 20.0
-
-
ns M dB
Not including any current drawn from the device pins by external circuitry. At VDD = 5.0V only. Signal levels are proportional to VDD, driven with a source impedance of <1000. 2-tone mode covers tones from ROM Page 1 and 2; 5/6-tone and HSC mode covers tones from ROM Page 3. Desponse times are for 95% probability. Timing for an external input to the XTAL/CLOCK pin.
(c) 2000 Consumer Microcircuits Limited
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D/813/33
Multi-Standard Analogue Paging Decoder
CMX813
1.7.1
Electrical Performance (continued) Notes Min. 100 100 0.0 1.0 500 500 200 200 75 25 75 0 Typ. Max. 1.0 Unit ns ns ns s s ns ns ns ns ns ns ns ns
"C-BUS" Timings (See Figure 3 and Note 9) tCSE tCSH tLOZ tHIZ tCSOFF tNXT tCK tCH tCL tCDS tCDH tRDS tRDH CSN-Enable to Clock-High time Last Clock-High to CSN-High time Clock-Low to Reply Output enable time CSN-High to Reply Output 3-state time CSN-High Time between transactions Inter-Byte Time Clock-Cycle time Serial Clock-High time Serial Clock-Low time Command Data Set-Up time Command Data Hold time Reply Data Set-Up time Reply Data Hold time
Figure 3 "C-BUS" Timing Notes: 5. Depending on the command, 1 or 2 bytes of COMMAND DATA are transmitted to the peripheral MSB (Bit 7) first, LSB (Bit 0) last. REPLY DATA is read from the peripheral MSB (Bit 7) first, LSB (Bit 0) last. 6. Data is clocked into and out of the peripheral on the rising SERIAL CLOCK edge. 7. Loaded commands are acted upon at the end of each command. 8. To allow for differing Controller serial interface formats "C-BUS" compatible ICs are able to work with either polarity SERIAL CLOCK pulses. 9. These timings are for the latest version of the "C-BUS" as embodied in the CMX813, and allow faster transfers than the original "C-BUS" timings given in CML Publication D/800/Sys/3 July 1994.
(c) 2000 Consumer Microcircuits Limited
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D/813/33
Multi-Standard Analogue Paging Decoder
CMX813
1.7.2
Packaging
Figure 4 Mechanical Outline: Order as part no. CMX813E4
Figure 5 Mechanical Outline: Order as part no CMX813P3
Handling precautions: This product includes input protection, however, precautions should be taken to prevent device damage from electro-static discharge. CML does not assume any responsibility for the use of any circuitry described. No IPR or circuit patent licences are implied. CML reserves the right at any time without notice to change the said circuitry and this product specification. CML has a policy of testing every product shipped using calibrated test equipment to ensure compliance with this product specification. Specific testing of all circuit parameters is not necessarily performed.
Oval Park - LANGFORD MALDON - ESSEX CM9 6WG - ENGLAND
Telephone: +44 (0)1621 875500 Telefax: +44 (0)1621 875600 e-mail: sales@cmlmicro.co.uk http://www.cmlmicro.co.uk
CML Microcircuits
COMMUNICATION SEMICONDUCTORS
CML Product Data
In the process of creating a more global image, the three standard product semiconductor companies of CML Microsystems Plc (Consumer Microcircuits Limited (UK), MX-COM, Inc (USA) and CML Microcircuits (Singapore) Pte Ltd) have undergone name changes and, whilst maintaining their separate new names (CML Microcircuits (UK) Ltd, CML Microcircuits (USA) Inc and CML Microcircuits (Singapore) Pte Ltd), now operate under the single title CML Microcircuits. These companies are all 100% owned operating companies of the CML Microsystems Plc Group and these changes are purely changes of name and do not change any underlying legal entities and hence will have no effect on any agreements or contacts currently in force. CML Microcircuits Product Prefix Codes Until the latter part of 1996, the differentiator between products manufactured and sold from MXCOM, Inc. and Consumer Microcircuits Limited were denoted by the prefixes MX and FX respectively. These products use the same silicon etc. and today still carry the same prefixes. In the latter part of 1996, both companies adopted the common prefix: CMX. This notification is relevant product information to which it is attached.
Company contact information is as below:
CML Microcircuits (UK)Ltd
COMMUNICATION SEMICONDUCTORS
CML Microcircuits (USA) Inc.
COMMUNICATION SEMICONDUCTORS
CML Microcircuits (Singapore)PteLtd
COMMUNICATION SEMICONDUCTORS
Oval Park, Langford, Maldon, Essex, CM9 6WG, England Tel: +44 (0)1621 875500 Fax: +44 (0)1621 875600 uk.sales@cmlmicro.com www.cmlmicro.com
4800 Bethania Station Road, Winston-Salem, NC 27105, USA Tel: +1 336 744 5050, 0800 638 5577 Fax: +1 336 744 5054 us.sales@cmlmicro.com www.cmlmicro.com
No 2 Kallang Pudding Road, 09-05/ 06 Mactech Industrial Building, Singapore 349307 Tel: +65 7450426 Fax: +65 7452917 sg.sales@cmlmicro.com www.cmlmicro.com
D/CML (D)/1 February 2002

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